Liquid crystal is a substance having properties between those of a conventional liquid and those of a solid crystal. Liquid crystal has ordered molecular arrangement. When liquid crystal is heated, it becomes a transparent liquid. When liquid crystal is cooled down, it appears like a cloudy solid. As such a substance has properties of liquid and crystal, it assumes the name “liquid crystal”. The principle of liquid crystal displays is to apply an electric field to liquid crystal enclosed in a glass casing to change the orientation of crystal liquid molecules and change the optical properties thereof. In cooperation with a polarizer, light transmittance of liquid crystal can thus be changed by an applied electric field.
Refer to FIG. 1 and FIG. 2 respectively a block diagram showing an LCD driver circuit and a block diagram showing a data-electrode driver circuit. An LCD driver generally comprises: a data-electrode driver 14, a scanning-electrode driver 13, a potential generator 12 providing signal potential for the abovementioned drivers, and a controller 11 providing control signals, wherein the data-electrode driver 14 and the scanning-electrode driver 13 are both electrically connected to an LCD panel 15. The controller 11 sends display data, latch pulses (LP), alternating driving signals (M), pulse width modulation signals (PWM), frame rate control signals (FRC) and vertical synchronous signals to the data-electrode driver 14. In the case that the potential generator 12 outputs five different potentials V1, V2, V3, V4 and V5, Potentials V1, V3 and V5 are input to the scanning-electrode driver 13, and Potentials V2 and V4 are input to the data-electrode driver 14. The LCD panel 15 has data electrodes X1, X2, . . . , Xn and scanning electrodes Y1, Y2, . . . , Ym. The intersections of the data electrodes X1, X2, . . . , Xn and the scanning electrodes Y1, Y2, . . . , Ym form LCD pixels.
The abovementioned data-electrode driver 14 has a latch register circuit 141, a switch control circuit 142, a voltage level shifter 143 and a driver output circuit 144. Via horizontal synchronous signals, the latch register circuit 141 temporarily stores display data line by line and sends them to the switch control circuit 142. The switch control circuit 142 processes the alternating driving signals (M), pulse width modulation signals (PWM), frame rate control signals (FRC) and display data into switch control signals. The voltage level shifter 143 converts the digital signals of the switch control signals into switch-control potentials and send the switch-control potentials to the driver output circuit 144. Switch devices 1441 respectively send the switch-control potentials to the data electrodes X1, X2, . . . , Xn to form the data-electrode signals the LCD panel 15 needs. In FIG. 2, the switch device 1441 controlling Potentials V2 and V4 is used for exemplification. Therefore, each switch device 1441 has two switches.
Refer to FIG. 3, FIG. 4 and FIG. 5. Below, a 2×4 liquid crystal matrix is used to exemplify an LCD panel. In a multi-task driving method, vertical synchronous signals sequentially trigger one of the four scanning electrodes Y1˜Y4 to select Potentials V1 or V5 each time, and all other scanning electrodes can only have Potential V3. For the data electrode X1 or X2, the pulse width is decided by display data. Then, Potential V2 or V4 is selected according to alternating driving signals. The gray level is decided by the RMS (Root Mean Square) of the voltage difference of the waveforms of the scanning electrode and the data electrode, such as |Y1−X1| or |Y1−X2|.
Refer to FIG. 3. Suppose V2-V3=V3-V4 and V1-V3=V3-V5. When the scanning electrodes Y1 and Y2 are at Potential V3 (non-selection signal), the RMS of the voltage differences of the scanning electrodes Y1 and Y2 and the data electrodes X1 and X2 will be identical in an ideal condition no matter what width the waveforms of the data electrodes X1 and X2 have. In other words, the presented gray level has nothing to do with the waveform width of the data electrodes X1 and X2. When the scanning electrodes Y1.about.Y4 are at Potentials V1 or V5 (selection signal), the pulse width of the data electrodes X1 and X2 will change the RMS. In other words, the pulse width of the data electrodes decides the gray level of pixels. Those described above is the basic principle of a liquid crystal matrix. Refer to FIG. 5(a) for the gray levels decided by the abovementioned waveforms. In an ideal condition, the four pixels along the data electrode X1 have the same gray level as the pixel X2-Y 1. The other three pixels along the data electrode X2 have the brightest gray level.
In reality, the data electrodes X1 and X2, the scanning electrodes Y1.about.Y4 and the driver circuit all have resistances, and a capacitance exists between each two electrodes, which will distort the driving waveforms, as shown in FIG. 4. When the scanning electrodes Yl.about.Y4 are at Potential V3, such a case will result in that the data electrodes X1 and X2 will mutually interfere, as shown in FIG. 5(b), wherein the pixel Xl-Y1 and the pixel X2-Y1 have different gray levels. Each voltage shift of the data electrode X1 or X2 will decrease the RMS. Thus, what is presented in a pixel is not just decided by the data that the system intends to display but also influenced by the data of the other pixels along the same data electrode X1 or X2. Consequently, brightness non-uniformity appears.
To overcome the abovementioned problem, a Japan patent publication no. 5265402 proposes a solution that the driving waveform of the data electrode X1 or X2 has an offset time during each scanning period. Then, the output is at a potential between the ON-presentation and the OFF presentation. Thus, the shift number of the effective voltage applied on the pixel will not vary with different display data. Thereby, the brightness non-uniformity resulting from waveform distortion can be eliminated. However, such a method has a lower effective voltage and a lower contrast than the conventional driving method because an intermediate potential is output during the offset time, and because each scanning period has an offset time. Increasing bias ratio can solve the problem. However, increasing bias ratio needs increasing output voltage. Thus, power consumption also increases.
To overcome the abovementioned problem, a U.S. Pat. No. 6,633,272 proposes a solution: during the voltage shift of the data electrode X1 or X2, if the data electrode is intended to shift to Potential V2, it is beforehand shifted to a higher potential V2′; if the data electrode is intended to shift to Potential V4, it is beforehand shifted to a lower potential V4′, as shown in FIG. 6. The excess effective voltage resulting from beforehand shifting to V2′ or V4′ can counterbalance the lost effective voltage resulting from the voltage shift of the data electrode X1 or X2. Thereby, the brightness non-uniformity resulting from waveform distortion can be eliminated.
Refer to FIG. 7. Alternatively, when there is no voltage shift of the data electrode X1 or X2 during a scanning period, the data electrode X1 or X2 is shifted to a potential V2′ lower than V2 or a potential V4′ higher than V4 to reduce the effective voltage of the data electrode without voltage shift and to offset the loss.
The abovementioned conventional technology can reduce effective voltage loss and contrast degradation to the minimum. As the voltage difference between V2′ and V2 or between V4′ and V4 is small, the current consumed in offset is also not great. However, the abovementioned technology has the disadvantage that the power supply needs two additional offset voltages V2′ and V4′. Further, the switch device 1442 of the driver output circuit 144 also needs two additional switches, as shown in FIG. 8. Besides, in LCD, a gray level is usually implemented with a pulse width modulation signal (PWM). Thus, the offset timing and the pulse width are constrained in the abovementioned technology.